Sep 20, 2021

Moore’s Law, a traditional benchmark in the semiconductor industry, has led to miniaturization, speed and efficiency improvements in modern microelectronics. The primary approach to keep up with the trend is to shrink the size of various features within an integrated circuit (IC). In recent years, however, engineers have extended fabrication techniques to sub-10 nm scales and layering circuitry on top of one another to develop 3D circuits  and thereby adhering to Moore’s Law.

There are several benefits of modern 3D semiconductor architectures including small footprint, improved performance, reduced power, and integration of diverse circuits in a single package. However, disadvantages such as design and manufacturing complexity along with poor fabrication yield which directly affect the cost of these chips. With research accelerating the means of producing cheap mainstream 3D IC structures, atomic layer deposition (ALD) has emerged as a critical fabrication technique.

Atomic Layer Deposition: advantages and disadvantages

Atomic Layer Deposition (ALD) is a technique for sequentially depositing thin films of gaseous reactants (called precursors) onto a substrate. The advantage of ALD over other chemical vapor deposition techniques is that gas-to-surface depositions that occur in ALD processes are intrinsically self-limited. Each ALD cycle starts with the introduction of a specific mixture of precursors followed by deposition which terminates when all the sites on the wafer have reacted. Therefore, ALD can achieve atomic layer precision as deposition occurs one layer at a time. Repeated cycles of different precursors result in the formation of a desired chemical deposition on a substrate which is ready for next stages of fabrication. The self-limiting nature of ALD processes is  beneficial for chemically processing high aspect ratio via, trenches, etc. in next generation high-capacity flash memory devices. 

The main drawback of depositing one-layer at a time comes with low throughput – ALD processes are slow. Novel reactor designs are needed to achieve faster processing times while maintaining quality of deposition. Processing a batch of 10s – 100s of stacked wafers inside a reactor is one viable method of increasing throughput. Several configurations of batch processors exist – these designs focus on the arrangement, orientation and number of wafers of a stack.

Numerical modelling: a high fidelity and low cost alternative to experiments

Optimization of reactor design and chemistry is critical to achieve high yields and lower costs of manufacturing semiconductors. Experimental prototyping of large reactors with complex geometries is tedious and expensive. Some overheads that are associated with every experiment are high cost of precursor gases, reactor prototyping, long experiment cycle times, and needless human exposure to toxic chemicals. These undesirable factors prompt engineers to resort to design and development using high fidelity numerical software tools such as Esgee Tech’s suite of multiphysics simulators.

Wafer processing typically occurs in high vacuum (~ milli-Torr) regimes. At such low pressures, the mean free path of participating gas species becomes significant and comparable to the size of the reactor, resulting in high Knudsen number slip flows. Results obtained using traditional CFD models raise several uncertainties in these cases. A true physics-based approach such as gas kinetic modeling is required to capture physics across very different length scales – from the meter-scale reactor scale dynamics to nanometer-scale mechanisms. Moreover, modelling ALD processes using numerical methods requires comprehensive coupling of physics: gas dynamics, multispecies reactive mechanisms in gas and surface phases, magnetohydrodynamics, electromagnetics and dust/macro-particle dynamics.

VizGlow™: Simulate Real Physics

Our flagship solver, VizGlow™ has particle simulation capabilities (in addition to a host of other modeling features) that allows fully-coupled 3D particle-based simulations, representing conditions observed in industrial reactors with high accuracy. VizGlow™ is capable of simulating reactive gas dynamics of semiconductor wafer processing devices using both direct-simulation-Monte-Carlo (DSMC), particle-in-cell (PIC), and hybrid coupled plasma-fluid simulations. Example applications of VizGlow™ include: simulation of capacitively coupled plasma (CCP) reactors, inductively coupled plasma (ICP) reactors, feature-scale etching/deposition simulations and magnetron sputtering. With VizGlow™ computational models, researchers gather a complete picture of the mechanisms of a wafer processing reactor occurring in macroscale and microscale for a fraction of cost compared to long, complex and costly experimental setups and analyses.

Our users at The University of Texas at Austin in collaboration with researchers at Samsung Electronics have modelled multispecies gas dynamics of an industrially relevant multi-wafer ALD batch reactor. Their work published recently in the Journal of Vacuum Science and Technology A, has also been featured as an editor’s pick for the journal’s September issue (

An in-depth look inside the ALD batch reactor:

The problem consists of a large industrial thermal ALD batch reactor that houses 25 wafers. A specific mixture of carrier gas N2 and silicon precursor Si2Cl6 (hexachlorodisilane, commonly referred to as HCD) are fed into the reactor at a rate of 5 SLPM through the central and lateral inlets. Three chamber pressure is achieved by controlling inlet flow rates. The walls of the reactor are treated as isothermal boundaries at 873 K.

The mesh contains 1.2 million tetrahedral elements and simulated over 15 million particles using the DSMC solver in VizGlow™.

The kinetic particle model in VizGlow™ is able to accurately simulate the gas dynamics in the flow inlet feed pipes, expansion through micronozzles, across the inter-wafer zones and the outlet. A particular region of interest among design engineers is the geometry of the spray nozzles and vicinity past nozzles. In this study, VizGlow™ captures the viscous dominating effects in the nozzle region due to the low pressure, high temperature, and small dimensions, the flow remains subsonic through the nozzle.

An important outcome of this simulation is significant non-uniformities recorded in the precursor distribution within a particular wafer and across different wafers. This is critical to understanding the process yield in these reactors. 

Cross sections of (a) #4, (b) #13, and (c) #22 wafers showing number density profiles of HCD for intermediate pressure (86 Pa)

Analyse your reactor designs using VizGlow™:

The studies, designs and resulting improvements surrounding wafer processing reactors are endless. This study paves a path to future studies on a variety of reactor configurations using VizGlow™.

Process engineers can optimise their reactor design by studying the effect of important parameters such as precursor flow rates, gas composition, nozzle designs, layout of the nozzles, orientation of wafers, size of wafers, pressure and thermal conditions – everything about a batch reactor can be accurately described with truly and fully coupled multiphysics with VizGlow™. Research to improve reactor efficiency through rapid trade studies can be performed using results from VizGlow™ at a much faster pace and a much cheaper budget than traditional experimentation.

Further reading:

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