As the semiconductor industry continues to shrink critical feature sizes and improve device performance, challenges in etch processing are increasing as a result of smaller features being processed with new device structures. Higher density and higher-aspect ratio features are introducing new challenges that require additional innovation in multiple areas of wafer processing. As a result of their complexity, these innovations are increasingly reliant on comprehensive physical, chemical, and computational models of plasma etch processes.
Plasma etching is a critical process used in semiconductor manufacturing for removing materials from unit surfaces and remains the only commercially viable technology for anisotropic removal of materials from surfaces. Although plasma was introduced into nano-electric fabrication processes in the mid-1980s and transistor size has shrunk by nearly two orders of magnitude, starting at 1.0 μm to ∼0.01 μm today, the progress was mainly driven by trial and error. Unfortunately, detailed mechanisms for plasma etch processes are not well understood yet for a majority of process gasses. Therefore, the development, improvement, and validation of these mechanisms remains a constant endeavor. This would open up more opportunities for innovation in this area.
Every Last, Atomic Detail
The growing costs of etching are threatening to slow the rate of improvement for density and process speed, though manufacturing expenses can be mitigated using simulation tools. Each generation of devices requires more layers, more patterning, and more cycles of patterning that continue to increase overall cost and complexity. Even if component size can be reduced further, this presents manufacturers with additional costs in developing even more precise lithography and etching machines. This highlights the balance between atomic layer processing in high volumes and the need for a renewed approach to miniaturization in order to extend Moore’s Law.
Plasma etching takes place as part of the process of wafer fabrication, which in turn is a main process in the manufacturing procedure for semiconductors. For a wafer to be finalized, cycles must be completed potentially hundreds of times with different chemicals. Each cycle increases the number of layers and features that the desired circuit carries.
Wafers begin as pure, non-conductive, thin silicon discs generally ~6 to 12 inches in diameter. These wafers are made of crystalline silicon, with extreme attention to chemical purity before oxidation and coating can occur. Oxidation is one of the oldest steps in semiconductor manufacturing, and has been used since the 1950s. Silicon has a great affinity for oxygen, and thus it is absorbed readily and transferred across the oxide. Layers of insulation and conductive materials are then coated onto the wafer before a photoresist – a mask for etching into the oxide – can be applied. Photoresist turns into soluble material when exposed to ultraviolet light, so that exposed areas can be dissolved using a solvent. The resulting pattern is what gives engineers control at later stages like etching and doping, when devices are formed. Integrated circuit patterns are first mapped onto a glass or quartz plate, with holes and transparencies that allow light to pass through, with multiple plates masking each layer of the circuit. The aforementioned ultraviolet light is then applied to transfer patterns from photoresist material coatings onto the wafer, with the photoresist chemicals also being removed prior to etching. It is at this point that a feed gas stream – a mixture of gasses with a carrier (like nitrogen) and an etchant (or other reactive gas) – is introduced to create chemical reactions that remove materials from the wafer.
During the etching process, areas left unprotected by the photoresist layer are chemically removed. Etching generally refers to removal of materials, however it requires that photomask layers and underlying materials remain unaffected in the process. In some cases, as with anisotropic etches, materials are removed in specific directions to produce geometric features like sharp edges and flat surfaces, which can also increase etch rates and lower cycle times. Metal deposition and etching includes placing metal links between transistors, and is one of the final steps before a wafer can be completed.
Both physical and chemical attributes are present in the etching process. The active species (atoms, ions, and radicals) are generated in the electron impact dissociation reaction of feed gasses. Feed gas mixtures for plasma etching are usually complex due to the conflicting requirements on etch rate, selectivity to mask and underlayer, and anisotropy. Also, the plasma itself dissociates the feed gas into reactive species which can react with each other in the gas phase and on the surface, leading to a further cascade of species generation in the plasma.
The most common etchant atoms are fluorine (F), chlorine (Cl), bromine (Br), and oxygen (O), which are usually produced by using the mixtures of chemically reactive gasses, such as CF₄, O₂, Cl₂, CCl₄, HBr, and CHCl₃. Inductively coupled as well as capacitively coupled plasma reactors (ICP and CCP, respectively) have found the most widespread use in semiconductor manufacturing. ICP sources allow the generation of relatively dense plasmas (∼10¹⁶–10¹⁷ m⁻³) at relatively low gas pressures (1–10 mTorr). With independent wafer biasing, they also allow independent control of the ion flux and ion energy at the wafer surface. This process can be engineered to be chemically selective in order to remove different materials at different rates.
Molecular Design in Mind
One of the most important applications of plasma etching is the selective, anisotropic removal of patterned silicon or polysilicon films. Halogen atom etchants (F, Cl, Br) bearing precursors’ feedstock gasses are almost always used for this purpose. Common feedstock gasses for F atoms are CₓFᵧ, SF₆, and NF₃. The understanding of physical and chemical processes in reactive plasmas requires reliable elementary finite-rate chemical reaction mechanisms. Tetrafluoromethane (CF₄) is one of the most frequently used gasses for the generation of F atoms. The admixture of a small percentage of oxygen to a CF₄ plasma dramatically increases the etch rates of silicon surfaces, and can also be used to control the lateral etching of silicon.
Tetrafluoromethane (CF₄) is an important feedgas for plasma etching of silicon. It is relatively easy to handle, non-corrosive, and has low toxicity. CF₄ has no stable electronic states which means that the electron energy is spent on the generation of chemically active ions and radicals without electronic excitation losses. While tetrafluoromethane plasmas have been studied since the early development of plasma etching processes, the influence of various gas-phase and surface reactions on the densities of active species is still poorly understood.
VizGlow™ is a full-featured, high-fidelity simulation tool for the modeling of chemically reactive plasmas, which are present in half of the steps undertaken in the semiconductor fabrication process described above. The characteristics of gas species and kinetic modeling of their reactions remain an area with yet unexplored potential for further innovation. Radicals created by plasmas are extremely reactive due to unpaired electrons, which is used by semiconductor engineers to speed up the process and cycle times. The same is true for deposition processes, where radicals prevent damage to the chip as it cools from the >1000 °C temperatures produced within etching equipment. Throughout these processes, defects, impurities, and nonuniformities can be detected and diagnosed with help from simulated models. Simulations using VizGlow™ can help guide the design iterations to avoid operating conditions that could comprise wafers even after months of processing.
Thanks for reading! If you’re still curious about the topics discussed in this article, check out the following journal papers (and ask us for a free copy!):
Levko, Dmitry, et al. “Computational study of plasma dynamics and reactive chemistry in a low-pressure inductively coupled CF4/O2 plasma.” Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena 39.4 (2021): 042202.
Levko, Dmitry, Chandrasekhar Shukla, and Laxminarayan L. Raja. “Modeling the effect of stochastic heating and surface chemistry in a pure CF4 inductively coupled plasma.” Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena 39.6 (2021): 062204.
Levko, Dmitry, et al. “Plasma kinetics of c-C4F8 inductively coupled plasma revisited.” Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena 40.2 (2022): 022203.
Lee, Chris GN, Keren J. Kanarik, and Richard A. Gottscho. “The grand challenges of plasma etching: a manufacturing perspective.” Journal of Physics D: Applied Physics 47.27 (2014): 273001.
Kanarik, Keren J. “Inside the mysterious world of plasma: A process engineer’s perspective.” Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films 38.3 (2020): 031004.
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