As the semiconductor industry continues to shrink critical feature sizes and improve device performance, challenges in etch processing are increasing as a result of smaller features being processed with new device structures. Higher density and higher-aspect ratio features are introducing new challenges that require additional innovation in multiple areas of wafer processing. As a result of their complexity, these innovations are increasingly reliant on comprehensive physical, chemical, and computational models of plasma etch processes.
Plasma etching is a critical process used in semiconductor manufacturing for removing materials from unit surfaces and remains the only commercially viable technology for anisotropic removal of materials from surfaces. Although plasma was introduced into nano-electric fabrication processes in the mid-1980s and transistor size has shrunk by nearly two orders of magnitude, starting at 1.0 μm to ∼0.01 μm today, the progress was mainly driven by trial and error. Unfortunately, detailed mechanisms for plasma etch processes are not well understood yet for a majority of process gasses. Therefore, the development, improvement, and validation of these mechanisms remains a constant endeavor. This would open up more opportunities for innovation in this area.
Every Last, Atomic Detail
The growing costs of etching are threatening to slow the rate of improvement for density and process speed, though manufacturing expenses can be mitigated using simulation tools. Each generation of devices requires more layers, more patterning, and more cycles of patterning that continue to increase overall cost and complexity. Even if component size can be reduced further, this presents manufacturers with additional costs in developing even more precise lithography and etching machines. This highlights the balance between atomic layer processing in high volumes and the need for a renewed approach to miniaturization in order to extend Moore’s Law.
Plasma etching takes place as part of the process of wafer fabrication, which in turn is a main process in the manufacturing procedure for semiconductors. For a wafer to be finalized, cycles must be completed potentially hundreds of times with different chemicals. Each cycle increases the number of layers and features that the desired circuit carries.
Wafers begin as pure, non-conductive, thin silicon discs generally ~6 to 12 inches in diameter. These wafers are made of crystalline silicon, with extreme attention to chemical purity before oxidation and coating can occur. Oxidation is one of the oldest steps in semiconductor manufacturing, and has been used since the 1950s. Silicon has a great affinity for oxygen, and thus it is absorbed readily and transferred across the oxide. Layers of insulation and conductive materials are then coated onto the wafer before a photoresist – a mask for etching into the oxide – can be applied. Photoresist turns into soluble material when exposed to ultraviolet light, so that exposed areas can be dissolved using a solvent. The resulting pattern is what gives engineers control at later stages like etching and doping, when devices are formed. Integrated circuit patterns are first mapped onto a glass or quartz plate, with holes and transparencies that allow light to pass through, with multiple plates masking each layer of the circuit. The aforementioned ultraviolet light is then applied to transfer patterns from photoresist material coatings onto the wafer, with the photoresist chemicals also being removed prior to etching. It is at this point that a feed gas stream – a mixture of gasses with a carrier (like nitrogen) and an etchant (or other reactive gas) – is introduced to create chemical reactions that remove materials from the wafer.
During the etching process, areas left unprotected by the photoresist layer are chemically removed. Etching generally refers to removal of materials, however it requires that photomask layers and underlying materials remain unaffected in the process. In some cases, as with anisotropic etches, materials are removed in specific directions to produce geometric features like sharp edges and flat surfaces, which can also increase etch rates and lower cycle times. Metal deposition and etching includes placing metal links between transistors, and is one of the final steps before a wafer can be completed.
Both physical and chemical attributes are present in the etching process. The active species (atoms, ions, and radicals) are generated in the electron impact dissociation reaction of feed gasses. Feed gas mixtures for plasma etching are usually complex due to the conflicting requirements on etch rate, selectivity to mask and underlayer, and anisotropy. Also, the plasma itself dissociates the feed gas into reactive species which can react with each other in the gas phase and on the surface, leading to a further cascade of species generation in the plasma.
The most common etchant atoms are fluorine (F), chlorine (Cl), bromine (Br), and oxygen (O), which are usually produced by using the mixtures of chemically reactive gasses, such as CF₄, O₂, Cl₂, CCl₄, HBr, and CHCl₃. Inductively coupled as well as capacitively coupled plasma reactors (ICP and CCP, respectively) have found the most widespread use in semiconductor manufacturing. ICP sources allow the generation of relatively dense plasmas (∼10¹⁶–10¹⁷ m⁻³) at relatively low gas pressures (1–10 mTorr). With independent wafer biasing, they also allow independent control of the ion flux and ion energy at the wafer surface. This process can be engineered to be chemically selective in order to remove different materials at different rates.
Molecular Design in Mind
One of the most important applications of plasma etching is the selective, anisotropic removal of patterned silicon or polysilicon films. Halogen atom etchants (F, Cl, Br) bearing precursors’ feedstock gasses are almost always used for this purpose. Common feedstock gasses for F atoms are CₓFᵧ, SF₆, and NF₃. The understanding of physical and chemical processes in reactive plasmas requires reliable elementary finite-rate chemical reaction mechanisms. Tetrafluoromethane (CF₄) is one of the most frequently used gasses for the generation of F atoms. The admixture of a small percentage of oxygen to a CF₄ plasma dramatically increases the etch rates of silicon surfaces, and can also be used to control the lateral etching of silicon.
Distribution of electron temperatures in an ICP reactor modeled using VizGlow™.
Tetrafluoromethane (CF₄) is an important feedgas for plasma etching of silicon. It is relatively easy to handle, non-corrosive, and has low toxicity. CF₄has no stable electronic states which means that the electron energy is spent on the generation of chemically active ions and radicals without electronic excitation losses. While tetrafluoromethane plasmas have been studied since the early development of plasma etching processes, the influence of various gas-phase and surface reactions on the densities of active species is still poorly understood.
VizGlow™is a full-featured, high-fidelity simulation tool for the modeling of chemically reactive plasmas, which are present in half of the steps undertaken in the semiconductor fabrication process described above. The characteristics of gas species and kinetic modeling of their reactions remain an area with yet unexplored potential for further innovation. Radicals created by plasmas are extremely reactive due to unpaired electrons, which is used by semiconductor engineers to speed up the process and cycle times. The same is true for deposition processes, where radicals prevent damage to the chip as it cools from the >1000 °C temperatures produced within etching equipment. Throughout these processes, defects, impurities, and nonuniformities can be detected and diagnosed with help from simulated models. Simulations using VizGlow™can help guide the design iterations to avoid operating conditions that could comprise wafers even after months of processing.
Thanks for reading! If you’re still curious about the topics discussed in this article, check out the following journal papers (and ask us for a free copy!):
Levko, Dmitry, et al. “Computational study of plasma dynamics and reactive chemistry in a low-pressure inductively coupled CF4/O2 plasma.” Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena 39.4 (2021): 042202.
Levko, Dmitry, Chandrasekhar Shukla, and Laxminarayan L. Raja. “Modeling the effect of stochastic heating and surface chemistry in a pure CF4 inductively coupled plasma.” Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena 39.6 (2021): 062204.
Levko, Dmitry, et al. “Plasma kinetics of c-C4F8 inductively coupled plasma revisited.” Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena 40.2 (2022): 022203.
Lee, Chris GN, Keren J. Kanarik, and Richard A. Gottscho. “The grand challenges of plasma etching: a manufacturing perspective.” Journal of Physics D: Applied Physics 47.27 (2014): 273001.
Kanarik, Keren J. “Inside the mysterious world of plasma: A process engineer’s perspective.” Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films 38.3 (2020): 031004.
Marchack, N., et al. “Plasma processing for advanced microelectronics beyond CMOS.” Journal of Applied Physics 130.8 (2021): 080901.
Interested in learning more about plasma flow simulations? Click here to take a look at our previous article. Feel free to follow us on Twitter and LinkedIn for more related news, or reach out to us directly at firstname.lastname@example.org. This post’s feature image is by Laura Ockel & Unsplash.
SPIE, the international society for optics and photonics, is holding its annual Advanced Lithography & Patterning Conference in San Jose, California from April 24th-28th. This conference gathers a community of experts in semiconductor design and fabrication to review current research, discuss major breakthroughs, and network with peers.
EsgeeTech’s paper, “VizGlow-MPS: a multi-fidelity process simulator for fast, yet accurate, semiconductor process design and optimization,” is being featured as part of the conference program. The paper discusses how high-fidelity models made with our software, VizGlow™ , provide experimentally validated results for equipment operation that inform reduced-order models which predict results in a few minutes of wall-clock time. The approach constitutes a “digital twin” for process reactors with multiple levels of fidelity that a process engineer can choose from. This approach is demonstrated on c-C4F8 inductively coupled plasma and pulsed CF4/H2 capacitively coupled plasma widely used in etching applications.
Esgee’s presentation is on April 27th from 2:50 PM – 3:10 PM PDT (4:50PM – 5:10PM CST) in Convention Center room 210C.
With renewed investment in the semiconductor industry by both the American government and private investors, opportunities for the next generation of American engineers are set to soar as the United States attempts to reclaim a greater share of global production. Accelerating the increasing demands for semiconductor engineers and technical specialists is a growing shortage of qualified workers. Despite the fact that semiconductors have become a key to supporting global critical infrastructure, injecting billions into the industry alone will not solve the problem. These factors are culminating in a pivotal moment for the trajectory of our shared technological future.
Along with the increase in funding and opportunity is another technical domain that the United States can target with their investments and incentives; plasma. Plasma cleaning, etching, and deposition, which play a heavy role in the early stages of material removal (or addition) from surfaces, have created large intersections between the realms of applied engineering and chemistry. Although plasma techniques are not new to the manufacturing process, expertise in these areas has been outsourced to other stops in the global semiconductor supply chain. Plasma is a key component enabling control and manipulation of physics at the atomic level, at a time where transistors have already pushed into the dimensions of single nanometers. Despite the dearth of expertise surrounding plasma devices and given the ever-increasing expectations from the semiconductor industry, plasma is set to play an even greater role in the semiconductor manufacturing process.
Clairvoyance in the Semiconductor Industry
In an industry that requires such high-level specialization, partnerships with academia and programs that introduce the field to young talent are an important step in fostering interest in these positions. A 2017 survey of US-based semiconductor manufacturers exposed that despite 75% of companies planning increased spending for L&D, there was a critical lack of resources and infrastructure to offer training. Semiconductor manufacturers may offer an unparalleled level of hands-on skill acquisition, but this would also require technical experts to be mentors in the workplace.
For EsgeeTech, a renewed focus on domestic semiconductor production presents the opportunity to serve the needs of the semiconductor industry through enhancing their plasma expertise. Douglas Breden and Anand Karpatne, our in-house plasma experts who have recently trained employees from Applied Materials and Tokyo Electron, made the point that a semiconductor wafer carries thousands of dollars worth of value in an area smaller than the size of a penny. These wafers are processed by complex machines which employ inductively coupled plasma (ICP) or capacitively coupled plasma (CCP) systems. With steep demand for the reliability of such manufacturing systems, root cause analysis of any potential issue would require an in-depth understanding of plasma physics. At Esgee, we equip our customers with customized training to enhance their understanding of plasma systems. As a result of feedback we have received recently, we are planning to expand our training to non-customers later this year. Breden and Karpatne believe that the fundamentals of plasma physics have become crucial for those seeking an understanding of modern semiconductor manufacturing systems.
However, there remains a lack of industry-specific training surrounding plasma theory and application. On the internet, there is still little discussion on this subject, even though the entire internet age has also been enabled by development provided via plasma manufactured systems. This is a core issue that EsgeeTech aims to resolve. The esoteric tag which has been added to plasma manufacturing is unjustified. Although specialization remains an enabling feature of the global supply chain, concentration of critical processes has also created the risk of systematic bottlenecks in the case of geopolitical conflict, natural disasters, or other issues that could affect specialist regions’ contributions to the global chain. Competition in plasma-specialized processes would reinforce vulnerabilities in the chain while alleviating demand.
Such a solution is in the best interest of semiconductor producers as well as the average electronics consumer, whose cell phone, computer, and other similar gadgets rely on plasma to produce. EsgeeTech stands out as a company with an established background in plasma techniques used by the semiconductor industry. Decades of experience through consultation projects with semiconductor manufacturers have contributed to our understanding of the problems faced within the industry, as well as the potential solutions. Our flagship product,VizGlow™, is designed specifically with the semiconductor industry in mind, with the goal of providing an end-to-end software package that enables innovation through robust multiphysics simulations.
VizGlow™ has always been a product developed with a focus on providing and improving its applications for semiconductor engineers. EsgeeTech’s larger clients have engaged with us in verification and validation of experimental data through VizGlow™, with many of these efforts currently available for review in open literature.
“The number of transistors on a microchip doubles every two years, while the cost of computers is halved” is an observation of technological trends known as “Moore’s Law.” Since the concept was first introduced in 1965 by Gordon Earle Moore, it has become a target for the speed of scaling and miniaturization within the semiconductor industry. The result of this desired level of innovation is that designs made today for tomorrow’s devices are done so with the expectation (but not the guarantee) of maintaining this rate. This creates immense pressure within the industry to revise and refine techniques, and is further compounded by the shortage of workers. At this stage of quantum processing and engineering, attracting qualified workers requires a promotion of the fields that semiconductor engineering intersects, as well as improving resources to lower the industry’s entry barrier.
EsgeeTech is a company that also relies on attracting a qualified workforce with interest in providing expertise to serve the semiconductor industry. Our collective backgrounds in fluid flow, electromagnetics, kinetic modeling, computational sciences, and computer science are examples of how diverse teams enable a company to excel amid an ever changing market. It also underscores the nature of plasma as a multidisciplinary subject, and further highlights the difficulties semiconductor manufacturers face in filling vacancies.
Interested in learning more about plasma flow simulations? Click here to take a look at our previous article. Feel free to follow us on Twitter and LinkedIn for more related news, or reach out to us directly at email@example.com. This post’s feature image courtesy of Hal Gatewood & Unsplash.
Esgee Technologies will be presenting at this year’s Society of Automotive Engineers (SAE) WCX World Congress Experience held in Detroit, Michigan from April 5th to 7th. Our paper, “Modeling of Switching Characteristics of Hydrogen-Nitrogen Filled DC Contactor Under External Magnetic Field,” was chosen from hundreds of submissions to be featured at the event.
WCX is among the top annual gatherings which provides an intersectional forum between automotive engineers, researchers, scientists, and technical innovators. This year’s topics include EV technology and electrical infrastructure, energy storage and battery disposition, as well as design and safety for automated vehicles.
We sat down with Dr. Rakesh Ranjan, who will be presenting on behalf of EsgeeTech this year, in order to learn more about the applications for this research and how they align with the conference’s goals:
What applications are there for EV relay arcs? And why choose SAE to discuss them?
SAE is the biggest confluence of engineers dedicated to enhancing our mobility in an environmentally friendly manner. If you are excited about the prospect of buying a cleaner vehicle which won’t contribute to environmental pollution, it’s likely that the EV technologies behind it started as concepts presented at an SAE conference. Technologies for the future of mobility have their beginnings right here at SAE conferences.
As for EV relays, it is a critical component for the safety of electric vehicles. With increasing power needs for electric vehicles, there comes an increase in things like battery size and voltage levels required to drive vehicles. An increase in voltage means that electric isolation of safety-critical components would be delayed due to prolonged arcing. So, how safe your vehicle is could ultimately depend on how quickly the arc channel inside the EV relay quenches.
Perhaps it may not be the first feature that consumers think of when it comes to vehicle safety, but for manufacturers and anyone involved in future maintenance on the vehicle, arc-resistant equipment is key to creating a safe environment. For the owner of an electric vehicle, arc-quenching is also a means of decreasing or completely removing the risk of damage from arc flash events. That, of course, is desirable because it means lowered maintenance costs and higher longevity for critical automotive components.
What is the quick takeaway from your talk?
A one-minute synopsis of my talk would be about the use of hydrogen-nitrogen mixtures for quenching of arcs. One typically associates hydrogen with flammability, but it also has fantastically high diffusive properties which could lead to quicker arc quenching. We report how hydrogen concentration leads to smaller arc lifetimes, which in turn improves a circuit’s interruption performance. We simulated contact separation in hydrogen-enriched and pure air environments using VizSpark™ which showed us that a strong external magnetic field can stretch the arc and reduce its extinction time.
You mention that you used VizSpark™ in your research. Why choose VizSpark™ specifically? What scenarios / applications is it useful for?
VizSpark™ is a multiphysics CFD solver which is capable of capturing the interaction between the plasma and flow with high fidelity. One thing which I really like about it is its robustness for a wide range of thermal plasma problems. You can throw in tough multiphysics problems: permanent magnets, high voltages and currents, supersonic flows, conjugate heat transfer. In terms of industrial applications, I could think of EV Relays, fuses, and high-voltage circuit breakers. It could also be used for safety assessment in high-voltage applications. For example, if there is local arcing inside a battery pack and you want to assess the root-cause through V-I traces, you could potentially do it in VizSpark™.
WCX ’22 Attendees can view Dr. Ranjan’s presentation in the “Electric Motor & Power Electronics” session from 10:00 AM to 10:30 AM CDT on Wednesday, April 6th.
Thanks for reading! If you’re still curious about the topics discussed in this article, check out the following journal papers (and ask us for a free copy!):
Ranjan, Rakesh, et al. Modelling of switching characteristics of hydrogen-nitrogen filled DC contactor under external magnetic field. No. 2022-01-0728. SAE Technical Paper, 2022.
Interested in learning more about plasma flow simulations? Click here to take a look at our previous article. Feel free to follow us on Twitter and LinkedIn for more related news, or reach out to us directly at firstname.lastname@example.org.
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